Noise can interfere with the operation of electronic systems by corrupting the signals in the systems. In complex electronic systems, such as processor systems, design choices can increase the susceptibility of signals in the system to corruption by noise. For example, increasing the length of a power-carrying conductor increases the susceptibility of a power signal to noise corruption. Since the power signal is coupled from the power-carrying conductors through transistors, resistors, capacitors, and other electronic components, noise on the power signal can be coupled to the signal-carrying conductors. Noise coupled to the signal carrying conductors may in turn corrupt signals on the signal-carrying conductors. For example, if a signal-carrying conductor carries a clock signal, then noise coupled to the signal-carrying conductor can corrupt the clock signal and cause inconsistent operation of any systems synchronized to the clock signal. It is therefore desirable to design electronic packaging to reduce the likelihood of corrupting power carrying conductors with noise.
A number of techniques for reducing the effects of noise in electronic systems are described in Noise Reduction Techniques in Electronic Systems, 2nd Edition, by Henry W. Ott. For example, Ott describes electromagnetic shielding packages and grounding structures that can be used to reduce noise in electronic systems. Unfortunately, these shielding packages and grounding structures and the general principles that underlie their operation are difficult to apply to complex electronic systems. The difficulty in applying these general principles to a complex electronic system increases as the number of substrates in the system increases, as the number of conductive layers in the substrates increases, as the number of signal and power carrying conductors increases, and as the frequency of any system clocks increases. The problem becomes especially difficult when long, power-carrying conductors are coupled to components external to a die. Such a problem arises in phase-locked loop circuits used in processors to generate a system clock. These circuits are often coupled by a long conductor to an external power supply filter located on a second level substrate.
For these and other reasons there is a need for the present invention.